Data or other information is commonly stored using memory devices, such as disk and tape storage devices. The data is typically stored in a binary format. When it is desirable to utilize the stored data, the storage device is accessed and the data is read using, for example, magnetic or optical assemblies.
An important aspect associated with stored data relates to the need to accurately read the data. The ability to accurately read data is affected by the data storage density, i.e., the greater the density generally means the more difficult it is to accurately read the data because of, for example, the lower signal-to-noise ratio and/or storage medium defects.
It has been recognized that, for a given signal-to-noise ratio, the accuracy of the data being read can be enhanced by using a Viterbi detector or receiver. A Viterbi detector is disclosed in the publication entitled "Viterbi Detection Of Class IV Partial Response On A Magnetic Recording Channel" of Wood and Petersen in IEEE Transactions on Communications, May 1986. The Viterbi algorithm is also discussed in connection with its digital data decoding application in an article entitled "The Viterbi Algorithm" of G. David Forney, Jr. in Proceedings Of The IEEE, March 1973. Briefly, the detector implements a Viterbi algorithm in which the binary state of a detected bit is determined by using a digitized form of the analog read signal. As stated in the Wood et al. article, the Viterbi algorithm operates with a set of discrete samples and provides an iterative method of determining the "best" path along branches of a trellis. The Viterbi algorithm determines the path that is the maximum-likelihood sequence. In conjunction with that determination, along each branch of the path, a metric is calculated that corresponds to the logarithm of the probability of that being the correct branch of the path. With respect to the implementation disclosed in the Wood publication, because of the considerable hardware involved, it appears expensive to implement and can be relatively slow in operation.
A more simplified Viterbi decoder is disclosed in an article entitled "Sequence (Viterbi-Equivalent) Decoding" of Richard C. Schneider in IEEE Transactions On Magnetics, November 1988. The decoder proposed in this article is concerned with magnetic recording and utilizes an implementation that includes a combination of Viterbi detection and a run-length code constraint. Basically, the use of the Viterbi algorithm is modified by a specific run-length code constraint metric whereby substantially the same accuracy in decoding the data is sought without the hardware expense that accompanies a strict or classic Viterbi implementation. The use of run-length code constraints is well-known in connection with storing data, for example, on magnetic tapes or magnetic and optical disks. The code constraint applies to the writing or storing of data. The code constraint can be defined using (d,k), where d is the minimum number of zeroes between "l's" and k is the maximum number of "0s" between consecutive "I's". The Schneider article discloses logic or algorithms that is utilized in determining the binary state of a detected bit using the combination of a Viterbi decoder and a specific run-length code constraint, for example, (0,3). Because binary ones are typically stored on magnetic disks or tapes in accordance with an alternating polarity, this article also points out that two different sets of equations can be utilized, depending upon whether a binary one having a positive polarity (sign) or a negative polarity (sign) is the next binary one to be detected. With regard to the implementation disclosed in the Schneider publication, a determination as to the binary state of the detected bit is made utilizing the value of the detected bit, together with the values of the next three consecutively occurring bits. Consequently, in making the determination, the Schneider solution limits the number of bits that are analyzed in determining the binary state of the detected bit. Accordingly, unlike the classic Viterbi detection, the logic or algorithms disclosed in the Schneider article does not utilize bits that occur or are obtained outside of a window defined by the run-length code constraint. For example, with respect to the specific run-length code constraint (0,3), the Schneider algorithms do not analyze consecutively obtained bits that are more than three bits from the bit currently being detected.
The use of Viterbi decoders is also discussed in issued U.S. Pats. In U.S. Pat. No. 4,709,377 to Martinez et al., issued Nov. 24, 1987, and entitled "Viterbi Decoder For Wire Line Modems," a Viterbi decoder is described for use with standard modems in order to improve the signal-to-noise ratio, while reducing hardware costs. U.S. Pat. No. 4,884,272 to McConnell, issued Nov. 28, 1989, and entitled "Maximum Likelihood Diversity Receiver" discloses a receiver system that employs a decoder that implements a Viterbi algorithm that is intended to increase the accuracy of the received data. U.S. Pat. No. 4,761,784 to Srinidasagopalan et al., issued Aug. 2, 1988, and entitled "Modem And Method Using Multi-Dimensional Coded Modulation," is directed to a decoder that utilizes Viterbi detection and is intended to implement the same at reduced cost, while maintaining desired accuracy.
U.S. Pat. No. 4,748,626 to Wong, issued May 31, 1988, and entitled "Viterbi Decoder With Reduced Number of Data Move Operations," discloses a Viterbi decoder that determines a maximum likelihood path that uses a wrap-around memory in which each addressable location that is indexed to a current state of a surviving path has a previous state of that surviving path stored thereat.